I felt a bit concerned after I read the following article on EE Times regarding the availability of PCI Express 4.0 in 2016-2017. The article mentions that we are now at the limit of what copper lanes can offer at 16 GT. They had some of the best electrical engineers working on the new specification to squeeze every bit (pun intended) of performance possible out of copper. Since PCIe 4.0 is in the last stages, I started to look at what was the next step after. Couldn’t find much information about PCIe 5.0 but I did find some interesting pieces of information about what might coming next. It looks like silicon photonics might be the next step with MXC fiber cabling going up to 800Gbps (1.6Tbps simplex), it definitely opens up new opportunities. The much hyped The Machine from HP was supposed to be a computer built using this technology. Fujitsu also had a prototype working. The technology has been up and running for a while now but I think manufacturing cost is still an issue. Avago (previously Altera) seems to have an FPGA with integrated optical I/O module that looks interesting. With Microsoft pushing for FPGAs in their cloud infrastructure (Azure SmartNICs and Catapult in Bing), we might be seeing more of those in the future. The demo of Azure SmartNIC was pretty impressive at the Open Networking Summit (thanks to Darryl van der Peijl for sharing this). It basically took throughput from 1Gbps to 29Gbps for an encrypted stream between two VMs by offloading the encryption work to an FPGA.
If you combine the lower cost of silicon photonics with advances in FPGA, we might see some interesting things happening in the future in regards to performance.